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EDITING: bitops.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Bit operations for the Hexagon architecture
 *
 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
 */

#ifndef _ASM_BITOPS_H
#define _ASM_BITOPS_H

#include <linux/compiler.h>
#include <asm/byteorder.h>
#include <asm/atomic.h>
#include <asm/barrier.h>

#ifdef __KERNEL__

/*
 * The offset calculations for these are based on BITS_PER_LONG == 32
 * (i.e. I get to shift by #5-2 (32 bits per long, 4 bytes per access),
 * mask by 0x0000001F)
 *
 * Typically, R10 is clobbered for address, R11 bit nr, and R12 is temp
 */

/**
 * test_and_clear_bit - clear a bit and return its old value
 * @nr:  bit number to clear
 * @addr:  pointer to memory
 */
static inline int test_and_clear_bit(int nr, volatile void *addr)
{
	int oldval;

__asm__ __volatile__ (
	"	{R10 = %1; R11 = asr(%2,#5); }\n"
	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
	"1:	R12 = memw_locked(R10);\n"
	"	{ P0 = tstbit(R12,R11); R12 = clrbit(R12,R11); }\n"
	"	memw_locked(R10,P1) = R12;\n"
	"	{if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n"
	: "=&r" (oldval)
	: "r" (addr), "r" (nr)
	: "r10", "r11", "r12", "p0", "p1", "memory"
	);

return oldval;
}

/**
 * test_and_set_bit - set a bit and return its old value
 * @nr:  bit number to set
 * @addr:  pointer to memory
 */
static inline int test_and_set_bit(int nr, volatile void *addr)
{
	int oldval;

__asm__ __volatile__ (
	"	{R10 = %1; R11 = asr(%2,#5); }\n"
	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
	"1:	R12 = memw_locked(R10);\n"
	"	{ P0 = tstbit(R12,R11); R12 = setbit(R12,R11); }\n"
	"	memw_locked(R10,P1) = R12;\n"
	"	{if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n"
	: "=&r" (oldval)
	: "r" (addr), "r" (nr)
	: "r10", "r11", "r12", "p0", "p1", "memory"
	);

return oldval;

}

/**
 * test_and_change_bit - toggle a bit and return its old value
 * @nr:  bit number to set
 * @addr:  pointer to memory
 */
static inline int test_and_change_bit(int nr, volatile void *addr)
{
	int oldval;

__asm__ __volatile__ (
	"	{R10 = %1; R11 = asr(%2,#5); }\n"
	"	{R10 += asl(R11,#2); R11 = and(%2,#0x1f)}\n"
	"1:	R12 = memw_locked(R10);\n"
	"	{ P0 = tstbit(R12,R11); R12 = togglebit(R12,R11); }\n"
	"	memw_locked(R10,P1) = R12;\n"
	"	{if (!P1) jump 1b; %0 = mux(P0,#1,#0);}\n"
	: "=&r" (oldval)
	: "r" (addr), "r" (nr)
	: "r10", "r11", "r12", "p0", "p1", "memory"
	);

return oldval;

}

/*
 * Atomic, but doesn't care about the return value.
 * Rewrite later to save a cycle or two.
 */

static inline void clear_bit(int nr, volatile void *addr)
{
	test_and_clear_bit(nr, addr);
}

static inline void set_bit(int nr, volatile void *addr)
{
	test_and_set_bit(nr, addr);
}

static inline void change_bit(int nr, volatile void *addr)
{
	test_and_change_bit(nr, addr);
}

/*
 * These are allowed to be non-atomic.  In fact the generic flavors are
 * in non-atomic.h.  Would it be better to use intrinsics for this?
 *
 * OK, writes in our architecture do not invalidate LL/SC, so this has to
 * be atomic, particularly for things like slab_lock and slab_unlock.
 *
 */
static __always_inline void
arch___clear_bit(unsigned long nr, volatile unsigned long *addr)
{
	test_and_clear_bit(nr, addr);
}

static __always_inline void
arch___set_bit(unsigned long nr, volatile unsigned long *addr)
{
	test_and_set_bit(nr, addr);
}

static __always_inline void
arch___change_bit(unsigned long nr, volatile unsigned long *addr)
{
	test_and_change_bit(nr, addr);
}

/*  Apparently, at least some of these are allowed to be non-atomic  */
static __always_inline bool
arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
{
	return test_and_clear_bit(nr, addr);
}

static __always_inline bool
arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
{
	return test_and_set_bit(nr, addr);
}

static __always_inline bool
arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
{
	return test_and_change_bit(nr, addr);
}

static __always_inline bool
arch_test_bit(unsigned long nr, const volatile unsigned long *addr)
{
	int retval;

asm volatile(
	"{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n"
	: "=&r" (retval)
	: "r" (addr[BIT_WORD(nr)]), "r" (nr % BITS_PER_LONG)
	: "p0"
	);

return retval;
}

static __always_inline bool
arch_test_bit_acquire(unsigned long nr, const volatile unsigned long *addr)
{
	int retval;

asm volatile(
	"{P0 = tstbit(%1,%2); if (P0.new) %0 = #1; if (!P0.new) %0 = #0;}\n"
	: "=&r" (retval)
	: "r" (addr[BIT_WORD(nr)]), "r" (nr % BITS_PER_LONG)
	: "p0", "memory"
	);

return retval;
}

/*
 * ffz - find first zero in word.
 * @word: The word to search
 *
 * Undefined if no zero exists, so code should check against ~0UL first.
 */
static inline long ffz(int x)
{
	int r;

asm("%0 = ct1(%1);\n"
		: "=&r" (r)
		: "r" (x));
	return r;
}

/*
 * fls - find last (most-significant) bit set
 * @x: the word to search
 *
 * This is defined the same way as ffs.
 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
 */
static inline int fls(unsigned int x)
{
	int r;

asm("{ %0 = cl0(%1);}\n"
		"%0 = sub(#32,%0);\n"
		: "=&r" (r)
		: "r" (x)
		: "p0");

return r;
}

/*
 * ffs - find first bit set
 * @x: the word to search
 *
 * This is defined the same way as
 * the libc and compiler builtin ffs routines, therefore
 * differs in spirit from the above ffz (man ffs).
 */
static inline int ffs(int x)
{
	int r;

asm("{ P0 = cmp.eq(%1,#0); %0 = ct0(%1);}\n"
		"{ if (P0) %0 = #0; if (!P0) %0 = add(%0,#1);}\n"
		: "=&r" (r)
		: "r" (x)
		: "p0");

return r;
}

/*
 * __ffs - find first bit in word.
 * @word: The word to search
 *
 * Undefined if no bit exists, so code should check against 0 first.
 *
 * bits_per_long assumed to be 32
 * numbering starts at 0 I think (instead of 1 like ffs)
 */
static inline unsigned long __ffs(unsigned long word)
{
	int num;

asm("%0 = ct0(%1);\n"
		: "=&r" (num)
		: "r" (word));

return num;
}

/*
 * __fls - find last (most-significant) set bit in a long word
 * @word: the word to search
 *
 * Undefined if no set bit exists, so code should check against 0 first.
 * bits_per_long assumed to be 32
 */
static inline unsigned long __fls(unsigned long word)
{
	int num;

asm("%0 = cl0(%1);\n"
		"%0 = sub(#31,%0);\n"
		: "=&r" (num)
		: "r" (word));

return num;
}

#include <asm-generic/bitops/lock.h>
#include <asm-generic/bitops/non-instrumented-non-atomic.h>

#include <asm-generic/bitops/fls64.h>
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/hweight.h>

#include <asm-generic/bitops/le.h>
#include <asm-generic/bitops/ext2-atomic.h>

#endif /* __KERNEL__ */
#endif

CANCEL

Name	Type	Size	Modified	Actions
↩ ..	DIR	—	—
📄 asm-offsets.h	H	35 B	2024-03-10 20:38	EDIT
📄 atomic.h	H	3.1 KB	2024-03-10 20:38	EDIT
📄 bitops.h	H	6.5 KB	2024-03-10 20:38	EDIT
📄 cache.h	H	555 B	2024-03-10 20:38	EDIT
📄 cacheflush.h	H	2.8 KB	2024-03-10 20:38	EDIT
📄 checksum.h	H	685 B	2024-03-10 20:38	EDIT
📄 cmpxchg.h	H	2 KB	2025-11-21 22:00	EDIT
📄 delay.h	H	344 B	2024-03-10 20:38	EDIT
📄 dma.h	H	300 B	2024-03-10 20:38	EDIT
📄 elf.h	H	5.6 KB	2024-03-10 20:38	EDIT
📄 exec.h	H	398 B	2024-03-10 20:38	EDIT
📄 fixmap.h	H	369 B	2024-03-10 20:38	EDIT
📄 fpu.h	H	90 B	2024-03-10 20:38	EDIT
📄 futex.h	H	2.3 KB	2024-03-10 20:38	EDIT
📄 hexagon_vm.h	H	5.8 KB	2024-03-10 20:38	EDIT
📄 intrinsics.h	H	369 B	2024-03-10 20:38	EDIT
📄 io.h	H	6.6 KB	2024-03-10 20:38	EDIT
📄 irq.h	H	576 B	2024-03-10 20:38	EDIT
📄 irqflags.h	H	860 B	2024-03-10 20:38	EDIT
📄 Kbuild	?	131 B	2024-03-10 20:38	EDIT
📄 kgdb.h	H	754 B	2024-03-10 20:38	EDIT
📄 linkage.h	H	237 B	2024-03-10 20:38	EDIT
📄 mem-layout.h	H	2.8 KB	2024-03-10 20:38	EDIT
📄 mmu.h	H	490 B	2024-03-10 20:38	EDIT
📄 mmu_context.h	H	1.5 KB	2024-03-10 20:38	EDIT
📄 page.h	H	4 KB	2024-03-10 20:38	EDIT
📄 perf_event.h	H	207 B	2024-03-10 20:38	EDIT
📄 pgalloc.h	H	2.7 KB	2024-03-10 20:38	EDIT
📄 pgtable.h	H	11 KB	2024-03-10 20:38	EDIT
📄 processor.h	H	2.9 KB	2024-03-10 20:38	EDIT
📄 ptrace.h	H	626 B	2024-03-10 20:38	EDIT
📄 smp.h	H	707 B	2024-03-10 20:38	EDIT
📄 spinlock.h	H	3.2 KB	2024-03-10 20:38	EDIT
📄 spinlock_types.h	H	549 B	2024-03-10 20:38	EDIT
📄 string.h	H	472 B	2024-03-10 20:38	EDIT
📄 suspend.h	H	238 B	2024-03-10 20:38	EDIT
📄 switch_to.h	H	478 B	2024-03-10 20:38	EDIT
📄 syscall.h	H	1.1 KB	2024-03-10 20:38	EDIT
📄 syscalls.h	H	204 B	2025-11-21 22:00	EDIT
📄 thread_info.h	H	3.3 KB	2024-03-10 20:38	EDIT
📄 time.h	H	346 B	2024-03-10 20:38	EDIT
📄 timex.h	H	495 B	2024-03-10 20:38	EDIT
📄 tlb.h	H	253 B	2024-03-10 20:38	EDIT
📄 tlbflush.h	H	1.5 KB	2024-03-10 20:38	EDIT
📄 traps.h	H	410 B	2024-03-10 20:38	EDIT
📄 uaccess.h	H	1.1 KB	2024-03-10 20:38	EDIT
📄 vdso.h	H	307 B	2024-03-10 20:38	EDIT
📄 vermagic.h	H	299 B	2024-03-10 20:38	EDIT
📄 vm_fault.h	H	359 B	2024-03-10 20:38	EDIT
📄 vm_mmu.h	H	2.8 KB	2024-03-10 20:38	EDIT
📄 vmalloc.h	H	99 B	2024-03-10 20:38	EDIT